Connection to Beagle Board
I'm working on a project where we would like to connect this display to a Beagle Board. I have electronics design experience, but I'm new to working with color TFT LCD screens.
1) The Beagle Board has a DVI/LCD output. I'm assuming I'll connect the LCD to this and run the LCD in RGB mode. In looking at the docs including the application note, it looks like I need to connect the data lines, the SPI lines, and configure the rest of the LCD connector pins appropriately. Is this it?
2) What are the specs on powering the backlight. I looked at the schematic in the app note and it's very hard to read. What is the chip used in that schematic?
3) To vary the brightness, is it possible to run my own PWM through the LEDA and LEDK lines, or am I required to use the BLC line?
-Stevo
Hi Steve,
Could you post the layout for the mating connector and signals on the Beagle Board so we can work to provide a layout?
Note, we have another customer who is also looking to build a daughter board with the 3.3" to mate to the Beagle Board, I will ask him to join our conversation.
Thanks for your reply. I have attached 2 images taken from the Beagle Board Hardware PDF. The LCD connectors contain the RGB data lines and some I2C lines which I'm assuming we won't use. The SPI connection is available on their expansion connector which is the other image.
The PDF document describes the expansion connector pins and the options. I'm assuming we'll need to configure that port to use McSPI3 or McSPI4 to communicate with the LCD.
Regarding powering the backlight, I would like to use a Linear Technologies chip if possible. They make a variety, including some that contain PWM circuits. I was trying to decipher the schematic in the app note and it's really hard to read. Do you have any Linear chips you recommend for powering the backlight?
Alternatively, although I'm new to the OMAP3530, it looks like there are PWM pins available on the expansion header that could be used as well and perhaps would be easier.
-Stevo
Attachment: Expansion Header.pdf (143.0KB)
Did anyone get this board running with a Beagle yet? Just got one of these LCDs a couple days ago, and I'm still trying to figure out how I'm going to hook it up, exactly.
Also: the Beagleboard's LCD headers are 1.8V, like almost everything else on the board. I noticed while going through the Magnachip controller's spec that IOVCI accepts 1.65-3.3V. Could I run 3.3V to VCI and 1.8V to IOVCI, and thus avoid the level shifting I'd need if I ran everything at 3.3V?
I have this LCD physically connected to the BeagleBoard and I am working through just how the heck to get it all software configured properly. What follows is a lot of stuff, but is everything in its current state - LCD register configuration + Angstrom Linux kernel setup.
When I play a movie through mplayer, I can see pixels in motion on the LCD, but they are all on the "top" and cover about a 3rd of the screen.
What are the correct values for all this stuff????
-Stevo
Angstrom Linux Kernel Setup:
From lcd_omap3beagle.c:
#define LCD_XRES 320
#define LCD_YRES 480
#define LCD_PIXCLOCK 20000 /* in kHz */
.config = OMAP_LCDC_PANEL_TFT | OMAP_LCDC_INV_VSYNC | OMAP_LCDC_INV_HSYNC,
.bpp = 16,
.data_lines = 24,
.x_res = LCD_XRES,
.y_res = LCD_YRES,
.hsw = 0x31, /* hsync_len */
.hfp = 0x3f, /* right_margin */
.hbp = 0xff, /* left_margin */
.vsw = 0x4, /* vsync_len */
.vfp = 0x5, /* lower_margin */
.vbp = 0x14, /* upper_margin */
.pixel_clock = LCD_PIXCLOCK,
It is necessary to setup the LCD screen through SPI correctly. Here are the current settings for the various register values:
// Driver Output Control (pg 45)
// Default: 0000 0000 0011 1100 - VSync Active Low
// HSync Active Low
// Read data at falling edge of DotClk
// Enable Active Low
// Alternate Scan Mode
// Gate Scan 1 -> 480
// 320 RGB x 480 lines
// AppNote: Same
// Us: Same
WMLCDCOM(0X0001);WMLCDDATA(0X003C); // Default 0x003C
// LCD Driving Waveform Control (pg 48)
// Default: 0000 0000 0000 0000 - Frame Inversion
// AppNote: 0000 0001 0000 0000 - Frame Inversion + Line Inversion
// Us: 0000 0001 0000 0000 - Frame Inversion + Line Inversion
WMLCDCOM(0X0002);WMLCDDATA(0X0100); // Default 0x0000
// Entry Mode (pg 49)
// Default: 0000 0000 0011 0000 - BGR => RGB
// Single Data Transfer
// Increment V, Increment H
// AppNote: 0001 0000 0010 0000 - BGR => BGR
// Single Data Transfer
// Increment V, Decrement H
// Us: 0001 0000 0011 0000 - BGR => BGR
// Single Data Transfer
// Increment V, Increment H
WMLCDCOM(0X0003);WMLCDDATA(0X1020); // Default 0x0030
// Blank Period Control (pg 60)
// Default: 0000 0010 0000 0010 - Front Porch is 2 raster periods
// Back Porch is 2 raster periods
// AppNote: 0000 1000 0000 1000 - Front Porch is 8 raster periods
// Back Porch is 8 raster periods
// Us: 0000 1000 0000 1000 - Front Porch is 8 raster periods
// Back Porch is 8 raster periods
WMLCDCOM(0X0008);WMLCDDATA(0X0808); // Default 0x0202
// Frame Cycle Control (pg 63)
// Default: 0000 0000 0000 0000 - Frame Frequency 120Hz
// Clock Cycles per H Line: 86
// AppNote: 0000 0101 0000 0000 - Frame Frequency 70 Hz
// Clock Cycles per H Line: 86
// Us: 0000 0110 0000 0000 - Frame Frequency 60 Hz
// Clock Cycles per H Line: 86
WMLCDCOM(0X000A);WMLCDDATA(0X0500); // Default 0x0000
// External Display Interface Control (pg 65)
// Default: 0000 0000 0000 0000 - System Interface
// Internal Clock
// AppNote: 0000 0000 0000 0000 - System Interface
// Internal Clock
// Us: 0000 0001 0001 0001 - RGB Interface
// External Clock
// 18-bit RGB, 1 transfer
WMLCDCOM(0X000B);WMLCDDATA(0X0111); // Default 0x0000
// LCD Interface Control (pg 67)
// Default: 0000 0000 0000 0000 - 1/1/4/8/12-clock
// No EQ
// 2/2/4/8/12-clock Non-Overlap period
// AppNote: 0000 0111 0111 0000 - 1/1/4/8/12-clock
// 7/7/28/56/84-clock EQ
// 9/9/32/64/96-clock Non-Overlap period
// Us: 0000 0000 0000 0000 - 1/1/4/8/12-clock
// No EQ
// 2/2/4/8/12-clock Non-Overlap period
WMLCDCOM(0X000C);WMLCDDATA(0X0000); // Default 0x0000
// Gate Scan Position Control (pg 69)
// Default: 0000 0000 0000 0000 - Start at gate G1
// AppNote: Same
// Us: Same
WMLCDCOM(0X000D);WMLCDDATA(0X0000); // Default 0x0000
// Frame Signal Control (pg 70)
// Default: 0000 0000 0000 0000 - Frame Sync is 1 frame
// Frame Sync position unknown
// AppNote: 0000 0000 0000 0001 - Frame Sync is 1 frame
// Frame Sync position 1
// Us: 0000 0000 0000 0001 - Frame Sync is 1 frame
// Frame Sync position 1
WMLCDCOM(0X000E);WMLCDDATA(0X0001); // Default 0x0000
// Power Control 2 (pg 75)
// Default: 0000 0100 0000 0100 - Boosting Factor: VCI1 x 5, VCI1 X - 3
// Medium Slew Rate
// AppNote: 0000 0100 0000 0110 - Boosting Factor: VCI1 x 5, VCI1 X - 3
// Medium Fast2 Slew Rate
// Us: 0000 0100 0000 0110 - Boosting Factor: VCI1 x 5, VCI1 X - 3
// Medium Fast2 Slew Rate
WMLCDCOM(0X0011);WMLCDDATA(0X0406); // Default 0x0404
// Power Control 3 (pg 76)
// Default: 0000 0000 0000 0000 - Auto-booster circuit off
// VCI1 voltage is 3V
// AppNote: 0000 0000 0000 1110 - Auto-booster circuit off
// VCI1 voltage is 1.5V
// Us: 0000 0000 0000 0000 - Auto-booster circuit off
// VCI1 voltage is 3V
WMLCDCOM(0X0012);WMLCDDATA(0X000E); // Default 0x0000
// Power Control 4 (pg 77)
// Default: 0000 0000 0000 0000 - Step-up circuit3 clock is line freq * 4
// Step-up circuit2 clock is line freq * 2
// Step-up circuit1 clock is line freq * 4
// AppNote: 0000 0010 0010 0010 - Step-up circuit3 clock is line freq * 1
// Step-up circuit2 clock is line freq * 0.5
// Step-up circuit1 clock is line freq * 1
// Us: 0000 0010 0010 0010 - Step-up circuit3 clock is line freq * 1
// Step-up circuit2 clock is line freq * 0.5
// Step-up circuit1 clock is line freq * 1
WMLCDCOM(0X0013);WMLCDDATA(0X0222); // Default 0x0000
// Power Control 5 (pg 78)
// Default: 0000 0000 0000 0000 - Gamma voltage is 5.000
// AppNote: 0000 0000 0001 0101 - Gamma voltage is 4.300
// Us: 0000 0000 0000 0000 - Gamma voltage is 5.000
WMLCDCOM(0X0014);WMLCDDATA(0X0015); // Default 0x0000
// Power Control 6 (pg 79)
// Default: 0000 0000 0000 0000 - VCOM voltage is 6.00
// OTP value selected
// VMH voltage is 5.000
// AppNote: 0100 0010 0111 0111 - VCOM voltage is 4.68
// Use VMH voltage
// VMH voltage is 3.167
// Us: 0000 0000 0000 0000 - VCOM voltage is 6.00
// OTP value selected
// VMH voltage is 5.000
WMLCDCOM(0X0015);WMLCDDATA(0X4277); // Default 0x0000
// Power Control 7 (pg 81)
// Default: 0000 0001 0000 0000 - VCOM low level is VSSA
// AppNote: 0000 0000 0000 0000 - VCOM low level is abs(VCOMH - VCOML)
// Us: 0000 0001 0000 0000 - VCOM low level is VSSA
WMLCDCOM(0X0016);WMLCDDATA(0X0000); // Default 0x0100
// Gamma Control (pg 85)
//WMLCDCOM(0X0028);WMLCDDATA(0X6A50); // Default 0x8888
//WMLCDCOM(0X0029);WMLCDDATA(0X00C9); // Default 0x0088
//WMLCDCOM(0X002A);WMLCDDATA(0XC7BE); // Default 0x8888
//WMLCDCOM(0X002B);WMLCDDATA(0X0003); // Default 0x0088
//WMLCDCOM(0X002C);WMLCDDATA(0X6A50); // Default 0x8888
//WMLCDCOM(0X002D);WMLCDDATA(0X00C9); // Default 0x0088
//WMLCDCOM(0X002E);WMLCDDATA(0XC7BE); // Default 0x8888
//WMLCDCOM(0X002F);WMLCDDATA(0X0003); // Default 0x0088
//WMLCDCOM(0X0030);WMLCDDATA(0X6A50); // Default 0x8888
//WMLCDCOM(0X0031);WMLCDDATA(0X00C9); // Default 0x0088
//WMLCDCOM(0X0032);WMLCDDATA(0XC7BE); // Default 0x8888
//WMLCDCOM(0X0033);WMLCDDATA(0X0003); // Default 0x0088
//WMLCDCOM(0X0034);WMLCDDATA(0X3443); // Default 0x8888
//WMLCDCOM(0X0035);WMLCDDATA(0X3443); // Default 0x8888
//WMLCDCOM(0X0036);WMLCDDATA(0X3443); // Default 0x8888
//WMLCDCOM(0X0037);WMLCDDATA(0X0000); // Default 0x0000
//WMLCDCOM(0X0038);WMLCDDATA(0X0000); // Default 0x0000
//WMLCDCOM(0X0039);WMLCDDATA(0X0000); // Default 0x0000
//WMLCDCOM(0X003A);WMLCDDATA(0X0000); // Default 0x0000
//WMLCDCOM(0X003B);WMLCDDATA(0X0000); // Default 0x0000
//WMLCDCOM(0X003C);WMLCDDATA(0X0000); // Default 0x0000
Delayms(20);
// Power Control 3 (pg 76) (2nd entry)
// AppNote: 0010 0000 0000 1110 - Auto-booster circuit off
// Activate Dual Step-up Circuit 1 (AVDD)
// VCI1 voltage is 1.5
// Us: no change
WMLCDCOM(0X0012);WMLCDDATA(0X200E); // Default 0x0000
Delayms(160);
// Power Control 3 (pg 76) (3rd entry)
// AppNote: 0010 0000 0000 0011 - Auto-booster circuit off
// Activate Dual Step-up Circuit 1 (AVDD)
// VCI1 voltage is 2.76
// Us: no change
WMLCDCOM(0X0012);WMLCDDATA(0X2003); // Default 0x0000
Delayms(40);
// Horizontal RAM Address End Position (pg 87)
// Default: 0000 0001 0011 1111 - 0x13F
// AppNote: Same
// Us: Same
WMLCDCOM(0X0044);WMLCDDATA(0X013F); // Default 0x013F
// Horizontal RAM Address Start Position (pg 87)
// Default: 0000 0000 0000 0000 - 0x000
// AppNote: Same
// Us: Same
WMLCDCOM(0X0045);WMLCDDATA(0X0000); // Default 0x0000
// Vertical RAM Address End Position (pg 88)
// Default: 0000 0001 1101 1111 - 0x1DF
// AppNote: Same
// Us: Same
WMLCDCOM(0X0046);WMLCDDATA(0X01DF); // Default 0x01DF
// Vertical RAM Address Start Position (pg 88)
// Default: 0000 0000 0000 0000 - 0x000
// AppNote: Same
// Us: Same
WMLCDCOM(0X0047);WMLCDDATA(0X0000); // Default 0x0000
// DDRAM Address
// Default: 0000 0000 0000 0000, 0000 0000 0000 0000
// Translates to row/col addresses of 0x000, 0x000
// AppNote: 0000 0000 0000 0000, 0000 0001 0011 1111
// Translates to row/col addresses of 0x000, 0x13F
// Us: 0000 0000 0000 0000, 0000 0000 0000 0000
// Translates to row/col addresses of 0x000, 0x000
WMLCDCOM(0X0020);WMLCDDATA(0X0000); // Default 0x0000
WMLCDCOM(0X0021);WMLCDDATA(0X013F); // Default 0x0000
// Write Data to DDRAM
WMLCDCOM(0X0022);
// //--------------------------------------------------------//
// //BLC control //
// //--------------------------------------------------------//
// //-----Display still image, choose the code below---------//
// WMLCDCOM(0X0067);WMLCDDATA(0X0200); // Default 0x0800
// WMLCDCOM(0X0004);WMLCDDATA(0X7000); // Default 0x2000
// WMLCDCOM(0X0005);WMLCDDATA(0X0002); // Default 0x0000
// WMLCDCOM(0X0048);WMLCDDATA(0X4B90); // Default 0x9199
// WMLCDCOM(0X0049);WMLCDDATA(0X95A0); // Default 0x9BAA
// WMLCDCOM(0X004A);WMLCDDATA(0XA0AC); // Default 0xAAC1
// WMLCDCOM(0X004B);WMLCDDATA(0XB5CE); // Default 0xD5EE
// //--------------------------------------------------------//
// //-----If Display motion picture, choose the code below---//
// CABC Control (pg 92)
// Default: 0000 1000 0000 0000 - Bypass test patterns with no enhancement
// AppNote: 0000 0010 0000 0000 - Enhance test patterns for power consumption reduction
// Us: 0000 0010 0000 0000 - Enhance test patterns for power consumption reduction
WMLCDCOM(0X0067);WMLCDDATA(0X0200); // Default 0x0800
// Display Control (pg 52)
// Default: 0010 0000 0000 0000 - BLC off
// AppNote: 0100 0000 1101 1101 - BLC on
// SMLC off
// BLC value is 0xDD
// Us: 0010 0000 0000 0000 - BLC off
WMLCDCOM(0X0004);WMLCDDATA(0X40DD); // Default 0x2000
//--------------------------------------------------------//
// Display Control (pg 57)
// Default: 0000 0000 0000 0000 - Partial Display Function off
// Gate Output off
// Full Color
// Normally-black panel
// Display image Black
// AppNote: 0000 0000 0001 0010 - Partial Display Function off
// Gate Output on
// Full Color
// Normally-black panel
// Display image Black
// Us: 0000 0000 0001 0010 - Partial Display Function off
// Gate Output on
// Full Color
// Normally-black panel
// Display image Black
WMLCDCOM(0X0007);WMLCDDATA(0X0012); // Default 0x0000
Delayms(40);
// Display Control(pg 57) 2nd entry
// AppNote: 0000 0000 0001 0111 - Partial Display Function off
// Gate Output on
// Full Color
// Normally-white panel
// Display image DDRAM Data
// Us: 0000 0000 0001 0011 - Partial Display Function off
// Gate Output on
// Full Color
// Normally-black panel
// Display image DDRAM Data
WMLCDCOM(0X0007);WMLCDDATA(0X0017); // Default 0x0000
// Write Data to DDRAM
WMLCDCOM(0X0022);
